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1 | 1 | //
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2 |
| -// Copyright (c) 1997, 2021, Oracle and/or its affiliates. All rights reserved. |
| 2 | +// Copyright (c) 1997, 2022, Oracle and/or its affiliates. All rights reserved. |
3 | 3 | // DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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4 | 4 | //
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5 | 5 | // This code is free software; you can redistribute it and/or modify it
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@@ -7825,9 +7825,9 @@ instruct divI_eReg(eAXRegI rax, eDXRegI rdx, eCXRegI div, eFlagsReg cr) %{
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7825 | 7825 | %}
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7826 | 7826 |
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7827 | 7827 | // Divide Register Long
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7828 |
| -instruct divL_eReg( eADXRegL dst, eRegL src1, eRegL src2, eFlagsReg cr, eCXRegI cx, eBXRegI bx ) %{ |
| 7828 | +instruct divL_eReg(eADXRegL dst, eRegL src1, eRegL src2) %{ |
7829 | 7829 | match(Set dst (DivL src1 src2));
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7830 |
| - effect( KILL cr, KILL cx, KILL bx ); |
| 7830 | + effect(CALL); |
7831 | 7831 | ins_cost(10000);
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7832 | 7832 | format %{ "PUSH $src1.hi\n\t"
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7833 | 7833 | "PUSH $src1.lo\n\t"
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@@ -7873,9 +7873,9 @@ instruct modI_eReg(eDXRegI rdx, eAXRegI rax, eCXRegI div, eFlagsReg cr) %{
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7873 | 7873 | %}
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7874 | 7874 |
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7875 | 7875 | // Remainder Register Long
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7876 |
| -instruct modL_eReg( eADXRegL dst, eRegL src1, eRegL src2, eFlagsReg cr, eCXRegI cx, eBXRegI bx ) %{ |
| 7876 | +instruct modL_eReg(eADXRegL dst, eRegL src1, eRegL src2) %{ |
7877 | 7877 | match(Set dst (ModL src1 src2));
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7878 |
| - effect( KILL cr, KILL cx, KILL bx ); |
| 7878 | + effect(CALL); |
7879 | 7879 | ins_cost(10000);
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7880 | 7880 | format %{ "PUSH $src1.hi\n\t"
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7881 | 7881 | "PUSH $src1.lo\n\t"
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