@@ -81,73 +81,74 @@ define_pd_global(intx, InitArrayShortSize, 9*BytesPerLong);
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range, \
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constraint) \
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\
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- product (uintx, PowerArchitecturePPC64, 0 , \
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+ product (uintx, PowerArchitecturePPC64, 0 , DIAGNOSTIC, \
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" Specify the PowerPC family version in use. If not provided, " \
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" HotSpot will determine it automatically. Host family version " \
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" is the maximum value allowed (instructions are not emulated)." ) \
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\
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- product(bool , SuperwordUseVSX, false , \
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- " Use Power8 VSX instructions for superword optimization." ) \
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- \
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/* Reoptimize code-sequences of calls at runtime, e.g. replace an */ \
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/* indirect call by a direct call. */ \
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- product(bool , ReoptimizeCallSequences, true , \
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+ product(bool , ReoptimizeCallSequences, true , DIAGNOSTIC, \
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" Reoptimize code-sequences of calls at runtime." ) \
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\
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/* Power 8: Configure Data Stream Control Register. */ \
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- product(uint64_t ,DSCR_PPC64, (uintx )-1, \
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+ product(uint64_t , DSCR_PPC64, (uint64_t )-1, \
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"Power8 or later: Specify encoded value for Data Stream Control " \
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"Register") \
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- product(uint64_t ,DSCR_DPFD_PPC64, 8 , \
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+ product(uint64_t , DSCR_DPFD_PPC64, 8 , \
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" Power8 or later: DPFD (default prefetch depth) value of the " \
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" Data Stream Control Register." \
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" 0: hardware default, 1: none, 2-7: min-max, 8: don't touch" ) \
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- product(uint64_t ,DSCR_URG_PPC64, 8 , \
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+ product(uint64_t , DSCR_URG_PPC64, 8 , \
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" Power8 or later: URG (depth attainment urgency) value of the " \
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" Data Stream Control Register." \
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" 0: hardware default, 1: none, 2-7: min-max, 8: don't touch" ) \
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\
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- product(bool , UseLoadInstructionsForStackBangingPPC64, false , \
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+ product(bool , UseLoadInstructionsForStackBangingPPC64, false , DIAGNOSTIC, \
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" Use load instructions for stack banging." ) \
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\
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+ product(bool , UseStaticBranchPredictionInCompareAndSwapPPC64, true , DIAGNOSTIC,\
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+ " Use static branch prediction hints in CAS operations." ) \
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+ product(bool , UseStaticBranchPredictionForUncommonPathsPPC64, false , DIAGNOSTIC,\
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+ " Use static branch prediction hints for uncommon paths." ) \
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+ \
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/* special instructions */ \
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- product(bool , UseByteReverseInstructions, false , \
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+ product(bool , SuperwordUseVSX, false , \
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+ " Use Power8 VSX instructions for superword optimization." ) \
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+ \
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+ product(bool , UseByteReverseInstructions, false , DIAGNOSTIC, \
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" Use byte reverse instructions." ) \
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\
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- product(bool , UseVectorByteReverseInstructionsPPC64, false , \
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+ product(bool , UseVectorByteReverseInstructionsPPC64, false , DIAGNOSTIC, \
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" Use Power9 xxbr* vector byte reverse instructions." ) \
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\
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- product(bool , UseCountLeadingZerosInstructionsPPC64, true , \
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+ product(bool , UseCountLeadingZerosInstructionsPPC64, true , DIAGNOSTIC, \
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" Use count leading zeros instructions." ) \
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\
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- product(bool , UseCountTrailingZerosInstructionsPPC64, false , \
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+ product(bool , UseCountTrailingZerosInstructionsPPC64, false , DIAGNOSTIC, \
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" Use count trailing zeros instructions." ) \
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\
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- product(bool , UseExtendedLoadAndReserveInstructionsPPC64, false , \
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+ product(bool , UseExtendedLoadAndReserveInstructionsPPC64, false , DIAGNOSTIC, \
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" Use extended versions of load-and-reserve instructions." ) \
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\
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- product(bool , UseRotateAndMaskInstructionsPPC64, true , \
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+ product(bool , UseRotateAndMaskInstructionsPPC64, true , DIAGNOSTIC, \
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" Use rotate and mask instructions." ) \
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\
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- product(bool , UseStaticBranchPredictionInCompareAndSwapPPC64, true , \
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- " Use static branch prediction hints in CAS operations." ) \
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- product(bool , UseStaticBranchPredictionForUncommonPathsPPC64, false , \
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- " Use static branch prediction hints for uncommon paths." ) \
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- \
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/* Trap based checks. */ \
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/* Trap based checks use the ppc trap instructions to check certain */ \
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/* conditions. This instruction raises a SIGTRAP caught by the */ \
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/* exception handler of the VM. */ \
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product(bool , UseSIGTRAP, true , \
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" Allow trap instructions that make use of SIGTRAP. Use this to " \
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" switch off all optimizations requiring SIGTRAP." ) \
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- product(bool , TrapBasedICMissChecks, true , \
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+ product(bool , TrapBasedICMissChecks, true , DIAGNOSTIC, \
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" Raise and handle SIGTRAP if inline cache miss detected." ) \
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- product(bool , TraceTraps, false , " Trace all traps the signal handler" \
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- " handles." ) \
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\
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- product(bool , ZapMemory, false , " Write 0x0101... to empty memory." \
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- " Use this to ease debugging." ) \
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+ product(bool , TraceTraps, false , DIAGNOSTIC, \
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+ " Trace all traps the signal handler handles." ) \
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+ \
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+ develop(bool , ZapMemory, false , \
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+ " Write 0x0101... to empty memory. Use this to ease debugging." ) \
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\
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/* Use Restricted Transactional Memory for lock elision */ \
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product(bool , UseRTMLocking, false , \
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